CMOS Integrated Wideband, Flexible and Scalable Beamforming Architecture

Thesis event information

Date and time of the thesis defence

Place of the thesis defence

Lecture Hall F101 in Kontinkangas, University of Oulu, Oulu, Finland

Topic of the dissertation

CMOS Integrated Wideband, Flexible and Scalable Beamforming Architecture

Doctoral candidate

M.Sc Electrical Engineering Rehman Akbar

Faculty and unit

University of Oulu Graduate School, Faculty of Information Technology and Electrical Engineering, CWC - Radio Technologies (CWC-RT)

Subject of study

Radio Frequency integrated circuits

Opponent

Professor Robert Bogdan Staszewski, University College Dublin, Ireland

Custos

Professor Aarno Pärssinen, University of Oulu

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CMOS Integrated Wideband, Flexible and Scalable Beamforming Architecture

This thesis presents the concepts and implementation of subarrays that offer flexible, scalable, and reconfigurable solutions for building large-scale arrays. Large-scale multi-beam phased array systems often experience inter-beam interference caused by independent subarrays. This interference must be cancelled either in analog and/or digital domains. Implementing interference rejection in the analog domain can relax the ADC dynamic range and reduce the number of required ADC bits. However, in broadband systems like 5G, rejecting interference over a wide bandwidth is challenging due to radio channel properties and receiver chain non-idealities. This work introduces a wideband architecture for mmWave to cover multiple frequency bands for future communication scenarios. The receiver architecture involves a two-stage beamforming approach for the multi-beam system. In the first stage, the subarray mmWave front-end covers the 5G NR bands (25-62 GHz) and improves the SNR by combining signals from antenna elements, providing spatial filtering. In the second stage, the system aims to implement a flexible inter-beam interference cancellation (IBIC) or combining signals from independent subarrays by utilizing an IF receiver (IF-RX) chip. The IF-RX chip offers interference rejection or a wideband signal combining between the subarrays. The interference rejection performance was measured over-the-air (OTA) using 5G NR signals. The results showed a rejection of 34-37 dB for 50-100 MHz signals while meeting the EVM requirements of the 5G NR standards with good margins. Finally, the interference rejections over a 4 x 100 MHz carrier-aggregated 5G NR waveform was demonstrated.

This work also proposes building large-scale phased array panels using grid-based PCB routing using chip-to-chip (C2C) interfaces. The implemented subarray RFIC features four 27 GHz C2C interfaces, two 9 GHz C2C interfaces, and a complex BB with > 400 MHz single-sided bandwidth. C2C interfaces use a frequency conversion module for signal combining/distribution. The subarray RFIC's module enables different modes of operation through an IF routing matrix, providing high reconfigurability. The frequency conversion can support horizontal and vertical combinations of signals in a large-scale panel. It can be used for IBIC in the BB domain, demonstrating the practical applications of the proposed system design.
Last updated: 12.9.2024